This application claims priority under 35 U.S.C. § 119(a) on Patent Application No. 2005-065585 filed in Japan on Mar. 9, 2005, the entire contents of which are hereby implemented by reference.
The present invention relates to an optical semiconductor device that is resin molded after mounting a light emitting element, an integrated circuit (IC), and a light receiving element on one side of a wiring substrate, further relates to an electronic device that has such an optical semiconductor device mounted thereon, and yet further relates to a method for producing an optical semiconductor device.
A method for producing a semiconductor device in which, after a large number of semiconductor element chips are mounted on one side of a wiring substrate, the semiconductor element chips are resin molded, and the resin molded portions and the wiring substrate are diced to separate individual semiconductor devices has been known (for example, JP H11-204555).
The prior art described in the above-mentioned JP H11-204555, however, has a problem in that application to an optical semiconductor device that has a light emitting element and a light receiving element mounted thereon is difficult since resin molding is performed using a screen printing method, so that, for example, a lens portion cannot be formed.
Therefore, an optical semiconductor device and a method for producing the same as described in FIGS. 6 to 10 are proposed.
FIG. 6 is a plan view of optical semiconductor devices in a state in which light emitting element chips, IC chips, and light receiving element chips have been mounted on one side of a wiring substrate.
Light emitting element chips 2, IC chips 3, and light receiving element chips 4 are mounted on a wiring substrate 1 by die bonding the light emitting element chips 2 for light emission, the IC chips 3 as integrated circuits for signal processing, and the light receiving element chips 4 for light receiving onto one side of the wiring substrate using conductive resin, and by wire bonding respective terminals of the light emitting element chips 2, the IC chips 3, and the light receiving element chips 4 to an appropriately formed pattern using a metal wire or the like (a mounting step).
The wiring substrate 1 has the light emitting element chips 2, the IC chips 3, and the light receiving element chips 4 that correspond, for example, to 6 optical semiconductor devices, which are to be diced and separated into individual optical semiconductor devices in a downstream step, mounted on one of its sides.
FIG. 7 is a plan view of a conventional optical semiconductor device after completing a molding step, showing a state in which resin molded portions are formed by resin molding light emitting element chips, IC chips, and light receiving element chips that have been mounted on one side of a wiring substrate. FIG. 8 is a side view as viewed from the direction of X shown with an arrow mark in FIG. 7.
Resin molded portions 50 are formed by performing resin molding using translucent resin with an appropriate mold that consists of rectangular parallelepipeds as a basic shape (molding step). In order to facilitate releasing of the mold after the resin molding, the resin molded portions 50 have first inclination portions 51, second inclination portions 52, third inclination portions 53, and fourth inclination portions 54 formed thereon so that they correspond to the wall surfaces of the rectangular parallelepipeds. The first inclination portions 51 are formed so that they have an appropriate angle relative to the direction perpendicular to the plane surface of the wiring substrate 1, and the second inclination portions 52 are formed opposite to the first inclination portions 51 at an angle, as with the first inclination portions 51, relative to the direction perpendicular to the plane surface of the wiring substrate 1. The third inclination portions 53 and the fourth inclination portions 54 are formed on the other wall surfaces in a manner similar to the first inclination portions 51 and the second inclination portions 52.
The resin molded portions 50 are provided with plane surface portions 55 that have a surface that is in parallel with the plane surface of the wiring substrate, and have lens portions 56 and 56 that correspond to the light emitting element chips 2 and the light receiving element chips 4 formed on a part of the plane surface portions 55.
After performing resin molding, the wiring substrate 1 is diced along the dicing lines DL to be separated into individual optical semiconductor devices that have built-in light emitting and light receiving features (separating step).
FIG. 9A is an explanation drawing that describes an individual optical semiconductor device, showing a plan view of the optical semiconductor device as viewed from the side with the lens portions. FIG. 9B is an explanation drawing that describes an individual optical semiconductor device, showing a side view as viewed from the direction of X shown with an arrow mark in FIG. 9A.
Since the wiring substrate 1 is diced perpendicular to the plane surface along the dicing lines DL, the wiring substrate 1 has a substrate end portion 100 that is perpendicular to the plane surface of the wiring substrate 1 adjacent to the first inclination portion 51 as well as a substrate end portion 101 that is perpendicular to the plane surface of the wiring substrate 1 adjacent to the second inclination portion 52.
In addition, since the optical semiconductor device is implemented in a device substrate 59 with the lens portions 56 facing in the lateral direction (see FIG. 10), the substrate end portion (mounting surface) 101 on the side with the second inclination portion 52, for example, has a terminal (not shown) that has been led through and placed for connection to the outside (for example, device substrate 59).
FIG. 10A is an explanation drawing that describes a state in which an optical semiconductor device is implemented in a device substrate of an electronic device, showing a front view of the optical semiconductor device as viewed from the side with the lens portions. FIG. 10B is a side view as viewed from the direction of X shown with an arrow mark in FIG. 10A.
The device substrate 59 of the electronic device has an appropriate wiring pattern (not shown) formed thereon, and the optical semiconductor device is implemented in the device substrate 59 by connecting the terminal of the substrate end portion 101 to the wiring pattern. More specifically, the substrate end portion (attraction surface) 100, which is located opposite to the substrate end portion 101 that has a terminal formed thereon, is attracted with a vacuum nozzle so that the substrate end portion 101 is aligned with and positioned to the wiring pattern of the device substrate 59. However, there is a problem in that it is difficult to achieve stable attraction and alignment since the area of the substrate end portion 100 as the area for attraction with a vacuum nozzle is limited due to a small thickness of the wiring substrate 1.
In addition, in order to prevent malfunction of the IC chip 3 caused by optical and electromagnetic noises, a shield case 60 may be installed. Since the shield case 60 is fixed by adhering it to the substrate end portion 100, a condition where the area of the substrate end portion 100 as the contact area is small causes unstable contact (adherence), which creates a problem in that an accurate directional pattern cannot be obtained if, for example, adhesion is made at an angle along the first inclination 51, causing a deviation in optical axes between the light emitting portion (light emitting element chip 2) and the light receiving portion (light receiving device chip 4) in the implemented state.
In addition, since the substrate end portion 101 needs to be in contact in parallel with the device substrate 59, the substrate end portion 101 needs to be parallel to the device substrate 59. However, since the wiring substrate 1 has a small thickness, the area of the substrate end portion 101 as a mounting area is limited, causing a problem in that the substrate end portion 101 cannot be brought into contact with the device substrate 59 in a stable manner.